Rapid Prototyping of Application Specific Signal
Processors
The Rapid Prototyping of Application Specific Signal Processors (RASSP)
program is a four and one-half year, $150 million Defense Advanced Research
Projects Agency (DARPA)/tri-Service initiative intended to dramatically
improve the process by which complex digital systems, particularly embedded
digital signal processors, are designed, manufactured, upgraded, and
supported. RASSP seeks an improvement of at least a factor of four in the
time required to take a design from concept to fielded prototype or to
upgrade an existing design, with similar improvements in design quality and
life cycle cost. The motivation for RASSP is the need to provide affordable
embedded signal processors for a wide range of DoD systems that are
state-of-the-art when they are fielded, rather than when they are first
defined.
The RASSP program manager is Elias Towe of DARPA's Electronics
Technology Office (DARPA/ETO) .
The RASSP program consists of two prime contractor teams, led by Lockheed Martin Advanced Technology
Laboratories and
Lockheed Sanders. In addition to these two large programs, there are
approximately 20 small technology base programs. The RASSP Education and Facilitation
Contractor, South Carolina Research Associates (SCRA) is responsible
for transfer of RASSP technology to industry and academia. The SCRA home
page is the primary home page for the RASSP program and contains pointers
to all other sites of interest, and other related RASSP information.
Honeywell Technology Center has three RASSP-related programs in place.
Further Reading
- PML Overview. Slide presentation.
- Interoperability Guidelines. A
guideline for creating interoperable performance models. Includes a
standard token description.
- HTC paper, "Evaluating Distributed
Multiprocessor Designs", from the 1995 RASSP conference, its postscript version, and corresponding viewgraphs
- HTC paper, "VHDL Performance Modeling"
, from the 1994 RASSP conference, its postscript version, and the corresponding viewgraphs
- HTC paper, "Integrated Simulation of
Performance Models and Behavioral Models" , from the Fall 1996 VHDL
International User's Forum. Best paper award.
- HTC paper, "Advanced Multiprocessor
System Modeling" , from the Fall 1995 VHDL International User's Forum
and its postscript version
- HTC viewgraphs from the Fall 1994 VHDL
International User's Forum
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